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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2021-01-25 09:50:54 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2021-01-28 11:43:06 +0000 |
| commit | d61ca09ec9342ec5683a67a50b9bdd3dbdcd3624 (patch) | |
| tree | a66a52a9aa662b034dd0fab7246c372846b48502 /gcc/go | |
| parent | fdb904a1822c38db5d69a50878b21041c476f045 (diff) | |
| download | gcc-d61ca09ec9342ec5683a67a50b9bdd3dbdcd3624.zip gcc-d61ca09ec9342ec5683a67a50b9bdd3dbdcd3624.tar.gz gcc-d61ca09ec9342ec5683a67a50b9bdd3dbdcd3624.tar.bz2 | |
aarch64: Reimplement vshrn_high_n* intrinsics using builtins
This patch reimplements the vshrn_high_n* intrinsics that generate the
SHRN2 instruction.
It is a vec_concat of the narrowing shift with the bottom part of the
destination register, so we need a little-endian and a big-endian version and an expander to
pick between them.
gcc/ChangeLog:
* config/aarch64/aarch64-simd-builtins.def (shrn2): Define
builtin.
* config/aarch64/aarch64-simd.md (aarch64_shrn2<mode>_insn_le):
Define.
(aarch64_shrn2<mode>_insn_be): Likewise.
(aarch64_shrn2<mode>): Likewise.
* config/aarch64/arm_neon.h (vshrn_high_n_s16): Reimlplement
using builtins.
(vshrn_high_n_s32): Likewise.
(vshrn_high_n_s64): Likewise.
(vshrn_high_n_u16): Likewise.
(vshrn_high_n_u32): Likewise.
(vshrn_high_n_u64): Likewise.
Diffstat (limited to 'gcc/go')
0 files changed, 0 insertions, 0 deletions