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authorLulu Cheng <chenglulu@loongson.cn>2024-01-30 15:02:32 +0800
committerLulu Cheng <chenglulu@loongson.cn>2024-02-02 09:13:33 +0800
commit3499793d04886856a416898bac82ede6c4b5c79e (patch)
tree655e44107727067aada1c11b4a0cae729d5b1b3f /gcc/go
parente2554540460add5357aeadbe99fb709aebbb415a (diff)
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LoongArch: Modify the address calculation logic for obtaining array element values through fp.
Modify address calculation logic from (((a x C) + fp) + offset) to ((fp + offset) + a x C). Thereby modifying the register dependencies and optimizing the code. The value of C is 2 4 or 8. The following is the assembly code before and after a loop modification in spec2006 401.bzip: old | new 735 .L71: | 735 .L71: 736 slli.d $r12,$r15,2 | 736 slli.d $r12,$r15,2 737 ldx.w $r13,$r22,$r12 | 737 ldx.w $r13,$r22,$r12 738 addi.d $r15,$r15,-1 | 738 addi.d $r15,$r15,-1 739 slli.w $r16,$r15,0 | 739 slli.w $r16,$r15,0 740 addi.w $r13,$r13,-1 | 740 addi.w $r13,$r13,-1 741 slti $r14,$r13,0 | 741 slti $r14,$r13,0 742 add.w $r12,$r26,$r13 | 742 add.w $r12,$r26,$r13 743 maskeqz $r12,$r12,$r14 | 743 maskeqz $r12,$r12,$r14 744 masknez $r14,$r13,$r14 | 744 masknez $r14,$r13,$r14 745 or $r12,$r12,$r14 | 745 or $r12,$r12,$r14 746 ldx.bu $r14,$r30,$r12 | 746 ldx.bu $r14,$r30,$r12 747 lu12i.w $r13,4096>>12 | 747 alsl.d $r14,$r14,$r18,2 748 ori $r13,$r13,432 | 748 ldptr.w $r13,$r14,0 749 add.d $r13,$r13,$r3 | 749 addi.w $r17,$r13,-1 750 alsl.d $r14,$r14,$r13,2 | 750 stptr.w $r17,$r14,0 751 ldptr.w $r13,$r14,-1968 | 751 slli.d $r13,$r13,2 752 addi.w $r17,$r13,-1 | 752 stx.w $r12,$r22,$r13 753 st.w $r17,$r14,-1968 | 753 ldptr.w $r12,$r19,0 754 slli.d $r13,$r13,2 | 754 blt $r12,$r16,.L71 755 stx.w $r12,$r22,$r13 | 755 .align 4 756 ldptr.w $r12,$r18,-2048 | 756 757 blt $r12,$r16,.L71 | 757 758 .align 4 | 758 This patch is ported from riscv's commit r14-3111. gcc/ChangeLog: * config/loongarch/loongarch.cc (mem_shadd_or_shadd_rtx_p): New function. (loongarch_legitimize_address): Add logical transformation code.
Diffstat (limited to 'gcc/go')
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