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author | Cong Hou <congh@google.com> | 2014-06-24 22:58:43 -0400 |
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committer | Cong Hou <congh@gcc.gnu.org> | 2014-06-24 22:58:43 -0400 |
commit | 79d652a570805345efea0ee370c0f7f07eada78c (patch) | |
tree | 84fbd0fced8d4e426b96dfd6edf4dfa423455a70 /gcc/gimple.c | |
parent | 22543f17af2e2f04ab57d7fc9bfed94da90345ba (diff) | |
download | gcc-79d652a570805345efea0ee370c0f7f07eada78c.zip gcc-79d652a570805345efea0ee370c0f7f07eada78c.tar.gz gcc-79d652a570805345efea0ee370c0f7f07eada78c.tar.bz2 |
tree-vect-patterns.c (vect_recog_sad_pattern): New function for SAD pattern recognition.
2014-06-24 Cong Hou <congh@google.com>
* tree-vect-patterns.c (vect_recog_sad_pattern): New function for SAD
pattern recognition.
(type_conversion_p): PROMOTION is true if it's a type promotion
conversion, and false otherwise. Return true if the given expression
is a type conversion one.
* tree-vectorizer.h: Adjust the number of patterns.
* tree.def: Add SAD_EXPR.
* optabs.def: Add sad_optab.
* cfgexpand.c (expand_debug_expr): Add SAD_EXPR case.
* expr.c (expand_expr_real_2): Likewise.
* gimple-pretty-print.c (dump_ternary_rhs): Likewise.
* gimple.c (get_gimple_rhs_num_ops): Likewise.
* optabs.c (optab_for_tree_code): Likewise.
* tree-cfg.c (estimate_operator_cost): Likewise.
* tree-ssa-operands.c (get_expr_operands): Likewise.
* tree-vect-loop.c (get_initial_def_for_reduction): Likewise.
* config/i386/sse.md: Add SSE2 and AVX2 expand for SAD.
* doc/generic.texi: Add document for SAD_EXPR.
* doc/md.texi: Add document for ssad and usad.
2014-06-24 Cong Hou <congh@google.com>
* gcc.dg/vect/vect-reduc-sad.c: New.
* lib/target-supports.exp (check_effective_target_vect_usad_char): New.
From-SVN: r211966
Diffstat (limited to 'gcc/gimple.c')
-rw-r--r-- | gcc/gimple.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gcc/gimple.c b/gcc/gimple.c index 03a84fb..4a9d379 100644 --- a/gcc/gimple.c +++ b/gcc/gimple.c @@ -1934,6 +1934,7 @@ get_gimple_rhs_num_ops (enum tree_code code) || (SYM) == WIDEN_MULT_PLUS_EXPR \ || (SYM) == WIDEN_MULT_MINUS_EXPR \ || (SYM) == DOT_PROD_EXPR \ + || (SYM) == SAD_EXPR \ || (SYM) == REALIGN_LOAD_EXPR \ || (SYM) == VEC_COND_EXPR \ || (SYM) == VEC_PERM_EXPR \ |