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authorRichard Sandiford <richard.sandiford@linaro.org>2017-11-01 11:49:34 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2017-11-01 11:49:34 +0000
commitef1d3b57d2d00795c6eb01fe6b8ef6f413163c67 (patch)
treeaf7a96746cc35a998026456f2e51bdbaea611a6a /gcc/gimple-ssa-store-merging.c
parentef339d6e2e846ba7ff544def1d79f10762da223d (diff)
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Add a fixed_size_mode class
This patch adds a fixed_size_mode machine_mode wrapper for modes that are known to have a fixed size. That applies to all current modes, but future patches will add support for variable-sized modes. The use of this class should be pretty restricted. One important use case is to hold the mode of static data, which can never be variable-sized with current file formats. Another is to hold the modes of registers involved in __builtin_apply and __builtin_result, since those interfaces don't cope well with variable-sized data. The class can also be useful when reinterpreting the contents of a fixed-length bit string as a different kind of value. 2017-11-01 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * machmode.h (fixed_size_mode): New class. * rtl.h (get_pool_mode): Return fixed_size_mode. * gengtype.c (main): Add fixed_size_mode. * target.def (get_raw_result_mode): Return a fixed_size_mode. (get_raw_arg_mode): Likewise. * doc/tm.texi: Regenerate. * targhooks.h (default_get_reg_raw_mode): Return a fixed_size_mode. * targhooks.c (default_get_reg_raw_mode): Likewise. * config/ia64/ia64.c (ia64_get_reg_raw_mode): Likewise. * config/mips/mips.c (mips_get_reg_raw_mode): Likewise. * config/msp430/msp430.c (msp430_get_raw_arg_mode): Likewise. (msp430_get_raw_result_mode): Likewise. * config/avr/avr-protos.h (regmask): Use as_a <fixed_side_mode> * dbxout.c (dbxout_parms): Require fixed-size modes. * expr.c (copy_blkmode_from_reg, copy_blkmode_to_reg): Likewise. * gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise. * omp-low.c (lower_oacc_reductions): Likewise. * simplify-rtx.c (simplify_immed_subreg): Take fixed_size_modes. (simplify_subreg): Update accordingly. * varasm.c (constant_descriptor_rtx::mode): Change to fixed_size_mode. (force_const_mem): Update accordingly. Return NULL_RTX for modes that aren't fixed-size. (get_pool_mode): Return a fixed_size_mode. (output_constant_pool_2): Take a fixed_size_mode. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r254300
Diffstat (limited to 'gcc/gimple-ssa-store-merging.c')
-rw-r--r--gcc/gimple-ssa-store-merging.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/gcc/gimple-ssa-store-merging.c b/gcc/gimple-ssa-store-merging.c
index 5a5b776..0bc4813 100644
--- a/gcc/gimple-ssa-store-merging.c
+++ b/gcc/gimple-ssa-store-merging.c
@@ -415,8 +415,11 @@ encode_tree_to_bitpos (tree expr, unsigned char *ptr, int bitlen, int bitpos,
The awkwardness comes from the fact that bitpos is counted from the
most significant bit of a byte. */
+ /* We must be dealing with fixed-size data at this point, since the
+ total size is also fixed. */
+ fixed_size_mode mode = as_a <fixed_size_mode> (TYPE_MODE (TREE_TYPE (expr)));
/* Allocate an extra byte so that we have space to shift into. */
- unsigned int byte_size = GET_MODE_SIZE (TYPE_MODE (TREE_TYPE (expr))) + 1;
+ unsigned int byte_size = GET_MODE_SIZE (mode) + 1;
unsigned char *tmpbuf = XALLOCAVEC (unsigned char, byte_size);
memset (tmpbuf, '\0', byte_size);
/* The store detection code should only have allowed constants that are