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| author | Andrew Stubbs <ams@codesourcery.com> | 2023-03-01 15:32:50 +0000 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2023-03-23 11:00:54 +0000 |
| commit | db80ccd34365c14e529111c94b93d3fb201b6eef (patch) | |
| tree | 40155abe9aeb7e9f81e91ea15484c9fafc9e26bf /gcc/gimple-range-path.cc | |
| parent | 484c41c747d95f9cee15a33b75b32ae2e7eb45f3 (diff) | |
| download | gcc-db80ccd34365c14e529111c94b93d3fb201b6eef.zip gcc-db80ccd34365c14e529111c94b93d3fb201b6eef.tar.gz gcc-db80ccd34365c14e529111c94b93d3fb201b6eef.tar.bz2 | |
amdgcn: vec_extract no-op insns
Just using move insn for no-op conversions triggers special move handling in
IRA which declares that subreg of vectors aren't valid and routes everything
through memory. These patterns make the vec_select explicit and all is well.
gcc/ChangeLog:
* config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
* config/gcn/gcn-valu.md (V_1REG_ALT): New.
(V_2REG_ALT): New.
(vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
(vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
(vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
* config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
* config/gcn/predicates.md (ascending_zero_int_parallel): New.
Diffstat (limited to 'gcc/gimple-range-path.cc')
0 files changed, 0 insertions, 0 deletions