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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-04-26 15:10:18 +0100 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-04-26 15:10:18 +0100 |
| commit | 80afac3121778e509e1847be90a1999236cff03a (patch) | |
| tree | f68eb8add978190c840e4c503b7bfe233020467b /gcc/gimple-range-path.cc | |
| parent | bd0791e899ea542deb6b3821b0a1d435d9754d5c (diff) | |
| download | gcc-80afac3121778e509e1847be90a1999236cff03a.zip gcc-80afac3121778e509e1847be90a1999236cff03a.tar.gz gcc-80afac3121778e509e1847be90a1999236cff03a.tar.bz2 | |
aarch64: Reimplement RSHRN intrinsic patterns with standard RTL codes
This patch reimplements the backend patterns for the rshrn intrinsics using standard RTL codes rather than UNSPECS.
We already represent shrn as truncate of a shift. rshrn can be represented as truncate (src + (1 << (shft - 1)) >> shft),
similar to how LLVM treats it.
I have a follow-up patch to do the same for the rshrn2 pattern, which will allow us to remove the UNSPEC_RSHRN entirely.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
with standard RTL codes instead of an UNSPEC.
(aarch64_rshrn<mode>_insn_be): Likewise.
(aarch64_rshrn<mode>): Adjust for the above.
* config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
Diffstat (limited to 'gcc/gimple-range-path.cc')
0 files changed, 0 insertions, 0 deletions