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| author | Uros Bizjak <ubizjak@gmail.com> | 2023-08-23 16:39:21 +0200 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2023-08-23 16:41:53 +0200 |
| commit | 94a25d3dede035ce8318ae25388d658753c90a3b (patch) | |
| tree | f58da26a710acb63a0f165429412382bc65a6b49 /gcc/gimple-range-fold.cc | |
| parent | 18befd6f050e70f11ecca1dd58624f0ee3c68cc7 (diff) | |
| download | gcc-94a25d3dede035ce8318ae25388d658753c90a3b.zip gcc-94a25d3dede035ce8318ae25388d658753c90a3b.tar.gz gcc-94a25d3dede035ce8318ae25388d658753c90a3b.tar.bz2 | |
i386: Fix register spill failure with concat RTX [PR111010]
Disable (=&r,m,m) alternative for 32-bit targets. The combination of two
memory operands (possibly with complex addressing mode), early clobbered
output, frame pointer and PIC registers uses too much registers on
a register constrained 32-bit target.
Also merge two similar patterns using DWIH mode iterator.
PR target/111010
gcc/ChangeLog:
* config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
Merge pattern from *concatditi3_3 and *concatsidi3_3 using
DWIH mode iterator. Disable (=&r,m,m) alternative for
32-bit targets.
(*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
alternative for 32-bit targets.
Diffstat (limited to 'gcc/gimple-range-fold.cc')
0 files changed, 0 insertions, 0 deletions