RISC-V: Support FP l/ll round and rint HF mode autovec

This patch would like to support the FP below API auto vectorization
with different type size

+------------+-----------+----------+
| API        | RV64      | RV32     |
+------------+-----------+----------+
| lrintf16   | HF => DI  | HF => SI |
| llrintf16  | HF => DI  | HF => DI |
| lroundf16  | HF => DI  | HF => SI |
| llroundf16 | HF => DI  | HF => DI |
+------------+-----------+----------+

Given below code:
void
test_lrintf16 (long *out, _Float16 *in, int count)
{
  for (unsigned i = 0; i < count; i++)
    out[i] = __builtin_lrintf16 (in[i]);
}

Before this patch:
.L3:
  lhu     a5,0(s0)
  addi    s0,s0,2
  addi    s1,s1,8
  fmv.s.x fa0,a5
  call    lrintf16
  sd      a0,-8(s1)
  bne     s0,s2,.L3

After this patch:
.L3:
  vsetvli a5,a2,e16,mf4,ta,ma
  vle16.v v1,0(a1)
  vfwcvt.f.f.v    v2,v1
  vsetvli zero,zero,e32,mf2,ta,ma
  vfwcvt.x.f.v    v1,v2
  vse64.v v1,0(a0)
  slli    a4,a5,1
  add     a1,a1,a4
  slli    a4,a5,3
  add     a0,a0,a4
  sub     a2,a2,a5
  bne     a2,zero,.L3

gcc/ChangeLog:

	* config/riscv/autovec.md: Add bridge mode to lrint and lround
	pattern.
	* config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg
	bridge machine mode.
	(expand_vec_lround): Ditto.
	* config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper
	func impl to emit vfwcvt.f.f.
	(emit_vec_rounding_to_integer): Handle the HF to DI rounding
	with the bridge mode.
	(expand_vec_lrint): Reorder the args.
	(expand_vec_lround): Ditto.
	(expand_vec_lceil): Ditto.
	(expand_vec_lfloor): Ditto.
	* config/riscv/vector-iterators.md: Add vector HFmode and bridge
	mode for converting to DI.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/unop/math-llrintf16-0.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/math-llroundf16-0.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/math-lrintf16-rv32-0.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/math-lrintf16-rv64-0.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv32-0.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-0.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/math-llrintf16-0.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/math-llroundf16-0.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv32-0.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv64-0.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv32-0.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv64-0.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

0 files changed, 0 insertions, 0 deletions