MIPS: Add instruction about global pointer register for mips16e2

The mips16e2 ASE uses eight general-purpose registers
from mips32, with some special-purpose registers,
these registers are GPRs: s0-1, v0-1, a0-3, and
special registers: t8, gp, sp, ra.

As mentioned above, the special register gp is
used in mips16e2, which is the global pointer register,
it is used by some of the instructions in the ASE,
for instance, ADDIU, LB/LBU, etc. .

This patch adds these instructions with corresponding tests.

gcc/ChangeLog:

	* config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
	that uses global pointer register.
	(mips16_unextended_reference_p): Same as above.
	(mips_pic_base_register): Same as above.
	(mips_init_relocs): Same as above.
	* config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
	(GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
	* config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
	(*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.

gcc/testsuite/ChangeLog:

	* gcc.target/mips/mips16e2-gp.c: New tests for mips16e2.

0 files changed, 0 insertions, 0 deletions