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| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-12-05 10:11:27 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-12-05 10:11:27 +0000 |
| commit | 80fc055cf00fee4b1f9f19f77c8880b12226e086 (patch) | |
| tree | 2bea0e571c02966011cf019454625d14c030cd04 /gcc/gimple-loop-interchange.cc | |
| parent | 084122adb5792a9c8e7f7876e2c1d59ba80c228b (diff) | |
| download | gcc-80fc055cf00fee4b1f9f19f77c8880b12226e086.zip gcc-80fc055cf00fee4b1f9f19f77c8880b12226e086.tar.gz gcc-80fc055cf00fee4b1f9f19f77c8880b12226e086.tar.bz2 | |
aarch64: Add a VNx1TI mode
Although TI isn't really a native SVE element mode, it's convenient
for SME if we define VNx1TI anyway, so that it can be used to
distinguish .Q ZA operations from others. It's purely an RTL
convenience and isn't (yet) a valid storage mode.
gcc/
* config/aarch64/aarch64-modes.def: Add VNx1TI.
Diffstat (limited to 'gcc/gimple-loop-interchange.cc')
0 files changed, 0 insertions, 0 deletions