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author | Kewen Lin <linkw@linux.ibm.com> | 2022-02-06 21:29:32 -0600 |
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committer | Kewen Lin <linkw@linux.ibm.com> | 2022-02-06 21:29:32 -0600 |
commit | 8103623923ac4ea19b97a369979d4bd5731aab57 (patch) | |
tree | 3584269aa672ec7161d770c99853d2b7eb6e0449 /gcc/gimple-expr.cc | |
parent | 353f8fcc2e6ce8997ddfdc55451f0f0e9450f981 (diff) | |
download | gcc-8103623923ac4ea19b97a369979d4bd5731aab57.zip gcc-8103623923ac4ea19b97a369979d4bd5731aab57.tar.gz gcc-8103623923ac4ea19b97a369979d4bd5731aab57.tar.bz2 |
rs6000: Disable MMA if no VSX support [PR103627]
As PR103627 shows, there is an unexpected case where !TARGET_VSX
and TARGET_MMA co-exist. As ISA3.1 claims, SIMD is a requirement
for MMA. By looking into the ICE, I noticed that the current
MMA implementation depends on vector pairs load/store which use
VSX register, but we don't have a separated option to control
Power10 vector support and Segher pointed out "-mpower9-vector is
a workaround that should go away" and more explanations in [1].
So this patch makes MMA require VSX instead.
[1] https://gcc.gnu.org/pipermail/gcc-patches/2022-January/589303.html
gcc/ChangeLog:
PR target/103627
* config/rs6000/rs6000.cc (rs6000_option_override_internal): Disable
MMA if !TARGET_VSX.
gcc/testsuite/ChangeLog:
PR target/103627
* gcc.target/powerpc/pr103627-1.c: New test.
* gcc.target/powerpc/pr103627-2.c: New test.
Diffstat (limited to 'gcc/gimple-expr.cc')
0 files changed, 0 insertions, 0 deletions