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| author | Jim Wilson <jimw@sifive.com> | 2020-05-30 17:04:17 -0700 |
|---|---|---|
| committer | Giuliano Belinassi <giuliano.belinassi@usp.br> | 2020-08-17 13:09:26 -0300 |
| commit | 34bbabf3864026754af82abe816c79f495e187f6 (patch) | |
| tree | 4f91a3680df7d3395578086c2364510bafcfd720 /gcc/gimple-array-bounds.cc | |
| parent | d7d9a0ccfb13ae84d8225acf70ef20af0b32f1e7 (diff) | |
| download | gcc-34bbabf3864026754af82abe816c79f495e187f6.zip gcc-34bbabf3864026754af82abe816c79f495e187f6.tar.gz gcc-34bbabf3864026754af82abe816c79f495e187f6.tar.bz2 | |
RISC-V: Optimize si to di zero-extend followed by left shift.
This is potentially a sequence of 3 shifts, we which optimize to a sequence
of 2 shifts. This can happen when unsigned int is used for array indexing.
gcc/
* config/riscv/riscv.md (zero_extendsidi2_shifted): New.
gcc/testsuite/
* gcc.target/riscv/zero-extend-5.c: New.
Diffstat (limited to 'gcc/gimple-array-bounds.cc')
0 files changed, 0 insertions, 0 deletions