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| author | Carl Love <cel@us.ibm.com> | 2018-01-22 17:27:12 +0000 |
|---|---|---|
| committer | Carl Love <carll@gcc.gnu.org> | 2018-01-22 17:27:12 +0000 |
| commit | d10cff958f5e180817c088d3e80e9f22d1a8f172 (patch) | |
| tree | 4a8456d6b3aedb748fa02286b212b6b15c0b4c19 /gcc/ggc-tests.c | |
| parent | f25d7e06e2327990e34b317761d4bfc92f523bcf (diff) | |
| download | gcc-d10cff958f5e180817c088d3e80e9f22d1a8f172.zip gcc-d10cff958f5e180817c088d3e80e9f22d1a8f172.tar.gz gcc-d10cff958f5e180817c088d3e80e9f22d1a8f172.tar.bz2 | |
rs6000-builtin.def (ST_ELEMREV_V1TI, [...]): Add macro expansion.
gcc/ChangeLog:
2018-01-22 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
LVX_V1TI): Add macro expansion.
* config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
* config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
Change check to determine if the instruction is a byte reversing
entry. Fix typo in comment.
* config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
Add def_builtin calls for new builtins.
* config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
Add define_insn expansion.
gcc/testsuite/ChangeLog:
2018-01-22 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/powerpc.exp: Add torture tests for
builtins-4-runnable.c, builtins-6-runnable.c,
builtins-5-p9-runnable.c, builtins-6-p9-runnable.c.
* gcc.target/powerpc/builtins-6-runnable.c: New test file.
* gcc.target/powerpc/builtins-4-runnable.c: Add additional tests
for signed/unsigned 128-bit and long long int loads.
From-SVN: r256952
Diffstat (limited to 'gcc/ggc-tests.c')
0 files changed, 0 insertions, 0 deletions