rs6000,extend and document built-ins vec_test_lsbb_all_ones and vec_test_lsbb_all_zeros

The built-ins currently support vector unsigned char arguments.  Extend the
built-ins to also support vector signed char and vector bool char
arguments.

Add documentation for the Power 10 built-ins vec_test_lsbb_all_ones
and vec_test_lsbb_all_zeros.  The vec_test_lsbb_all_ones built-in
returns 1 if the least significant bit in each byte is a 1, returns
0 otherwise.  Similarly, vec_test_lsbb_all_zeros returns a 1 if
the least significant bit in each byte is a zero and 0 otherwise.

Add addtional test cases for the built-ins in files:
  gcc/testsuite/gcc.target/powerpc/lsbb.c
  gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c

gcc/ChangeLog:
	* config/rs6000/rs6000-overload.def (vec_test_lsbb_all_ones,
	vec_test_lsbb_all_zeros): Add built-in instances for vector signed
	char and vector bool char.
	* doc/extend.texi (vec_test_lsbb_all_ones,
	vec_test_lsbb_all_zeros): Add documentation for the
	existing built-ins.

gcc/testsuite/ChangeLog:gcc/testsuite/ChangeLog:
	* gcc.target/powerpc/lsbb-runnable.c: Add test cases for the vector
	signed char and vector bool char instances of
	vec_test_lsbb_all_zeros and vec_test_lsbb_all_ones built-ins.
	* gcc.target/powerpc/lsbb.c: Add compile test cases for the vector
	signed char and vector bool char instances of
	vec_test_lsbb_all_zeros and vec_test_lsbb_all_ones built-ins.

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