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authorVineet Gupta <vineetg@rivosinc.com>2023-10-24 20:38:49 -0700
committerVineet Gupta <vineetg@rivosinc.com>2023-11-15 09:30:58 -0800
commitfb4e2c1648ea4cf1b1d34205a1da519702328d92 (patch)
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parentb126f3ffbef59b0b08c2c2a664133d7d6f5ca235 (diff)
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RISC-V: elide unnecessary sign extend when expanding cmp_and_jump
RV64 compare and branch instructions only support 64-bit operands. At Expand time, the backend conservatively zero/sign extends its operands even if not needed, such as incoming function args which ABI/ISA guarantee to be sign-extended already (this is true for SI, HI, QI operands) And subsequently REE fails to eliminate them as "missing defintion(s)" or "multiple definition(s) since function args don't have explicit definition. So during expand riscv_extend_comparands (), if an operand is a subreg-promoted SI with inner DI, which is representative of a function arg, just peel away the subreg to expose the DI, eliding the sign extension. As Jeff noted this routine is also used in if-conversion so potentially can also help there. Note there's currently patches floating around to improve REE and also a new pass to eliminate unneccesary extensions, but it is still beneficial to not generate those extra extensions in first place. It is obviously less work for post-reload passes such as REE, but even for earlier passes, such as combine, having to deal with one less thing and ensuing fewer combinations is a win too. Way too many existing tests used to observe this issue. e.g. gcc.c-torture/compile/20190827-1.c -O2 -march=rv64gc It elimiates the SEXT.W gcc/ChangeLog: * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New. * (riscv_extend_comparands): Call New function on operands. Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #676 Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
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