RISC-V: Fix ICE in non-canonical march parsing

Passing in a base extension in non-canonical order (i, e, g) causes GCC
to ICE:
xgcc: error: '-march=rv64ge': ISA string is not in canonical order. 'e'
xgcc: internal compiler error: in add, at common/config/riscv/riscv-common.cc:671
...

This is fixed by skipping to the next extension when a non-canonical
order is detected.

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse_std_ext): Emit an error and skip to
	the next extension when a non-canonical ordering is detected.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/arch-27.c: New test.
	* gcc.target/riscv/arch-28.c: New test.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

0 files changed, 0 insertions, 0 deletions