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| author | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | 2022-11-28 22:14:06 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2022-12-02 00:13:45 +0800 |
| commit | 3b16afeb3f6aacf64b9f9c50b7cb9805a9dfff63 (patch) | |
| tree | a851cff4c65fa0a404dc17a9167b9f98fa7adf94 /gcc/gcc.cc | |
| parent | fa144175c9ccaa10d7021d00f97aaa9eac59afec (diff) | |
| download | gcc-3b16afeb3f6aacf64b9f9c50b7cb9805a9dfff63.zip gcc-3b16afeb3f6aacf64b9f9c50b7cb9805a9dfff63.tar.gz gcc-3b16afeb3f6aacf64b9f9c50b7cb9805a9dfff63.tar.bz2 | |
RISC-V: Add attributes for VSETVL PASS
gcc/ChangeLog:
* config/riscv/riscv-protos.h (enum vlmul_type): New enum.
(get_vlmul): New function.
(get_ratio): Ditto.
* config/riscv/riscv-v.cc (struct mode_vtype_group): New struct.
(ENTRY): Adapt for attributes.
(enum vlmul_type): New enum.
(get_vlmul): New function.
(get_ratio): New function.
* config/riscv/riscv-vector-switch.def (ENTRY): Adapt for attributes.
* config/riscv/riscv.cc (ENTRY): Ditto.
* config/riscv/vector.md (false,true): Add attributes.
Diffstat (limited to 'gcc/gcc.cc')
0 files changed, 0 insertions, 0 deletions