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author | Richard Sandiford <richard.sandiford@arm.com> | 2019-08-07 19:05:42 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2019-08-07 19:05:42 +0000 |
commit | b0760a40bef3ca690691bf5d214da95b5dc25266 (patch) | |
tree | 31d17f3a279b165abe7583d403df0cfe3bf46838 /gcc/gcc.c | |
parent | 0d80d083a2e1d368fcb11eb7ea5490c274f0ea15 (diff) | |
download | gcc-b0760a40bef3ca690691bf5d214da95b5dc25266.zip gcc-b0760a40bef3ca690691bf5d214da95b5dc25266.tar.gz gcc-b0760a40bef3ca690691bf5d214da95b5dc25266.tar.bz2 |
[AArch64] Merge SVE reduction patterns
The reorg showed that we had an unnecessary separation between
the bitwise and max/min reductions for integers, and the
addition and max/min reductions for fp.
2019-08-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (BITWISEV): Delete.
(SVE_INT_REDUCTION, SVE_FP_REDUCTION): New int iterators.
(optab): Handle UNSPEC_UMAXV, UNSPEC_UMINV, UNSPEC_SMAXV,
UNSPEC_SMINV, UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV,
UNSPEC_FMINNMV, UNSPEC_FMINV.
(bit_reduc_op): Delete.
(sve_int_op): New int attribute.
(sve_fp_op): Handle UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV,
UNSPEC_FMINNMV, UNSPEC_FMINV.
* config/aarch64/aarch64-sve.md
(reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>)
(*reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>)
(reduc_<BITWISEV:optab>_scal_<SVE_I:mode>)
(*reduc_<BITWISEV:optab>_scal_<SVE_I:mode>): Merge into...
(reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>)
(*reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>): ...these
new patterns.
(reduc_plus_scal_<SVE_F:mode>, *reduc_plus_scal_<SVE_I:mode>)
(reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>)
(*reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>): Merge into...
(reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>)
(*reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>): ...these
new patterns.
From-SVN: r274190
Diffstat (limited to 'gcc/gcc.c')
0 files changed, 0 insertions, 0 deletions