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authorRichard Sandiford <richard.sandiford@arm.com>2019-08-15 08:39:42 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2019-08-15 08:39:42 +0000
commit432b29c189a6d26ed701c7518402708b2fcb794f (patch)
treeae62e77cb99e0dacf887f0ce02f765500e34a86c /gcc/function.c
parent06b3ba23eb6ff965a92cd99d2835d4c29316a447 (diff)
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[AArch64] Add more SVE FMLA and FMAD /z alternatives
This patch makes the floating-point conditional FMA patterns provide the same /z alternatives as the integer patterns added by a previous patch. We can handle cases in which individual inputs are allocated to the same register as the output, so we don't need to force all registers to be different. 2019-08-15 Richard Sandiford <richard.sandiford@arm.com> Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> gcc/ * config/aarch64/aarch64-sve.md (*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_any): Add /z alternatives in which one of the inputs is in the same register as the output. gcc/testsuite/ * gcc.target/aarch64/sve/cond_mla_5.c: Allow FMAD as well as FMLA and FMSB as well as FMLS. Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org> From-SVN: r274516
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