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author | Georg-Johann Lay <avr@gjlay.de> | 2023-05-25 19:02:34 +0200 |
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committer | Georg-Johann Lay <avr@gjlay.de> | 2023-05-25 19:06:29 +0200 |
commit | ff0a6900700636ac4c7f40b88490a20d19a68db3 (patch) | |
tree | 4626779ce3cb81eb01cf15ad943dc1b45172f438 /gcc/fortran | |
parent | 19fc92d8a99ed60ee3b652727f222ea656550e55 (diff) | |
download | gcc-ff0a6900700636ac4c7f40b88490a20d19a68db3.zip gcc-ff0a6900700636ac4c7f40b88490a20d19a68db3.tar.gz gcc-ff0a6900700636ac4c7f40b88490a20d19a68db3.tar.bz2 |
target/82931: Make a pattern more generic to match more bit-transfers.
There is already a pattern in avr.md that matches single-bit transfers
from one register to another one, but it only handled bit 0 of 8-bit
registers. This change makes that pattern more generic so it matches
more of similar single-bit transfers.
gcc/
PR target/82931
* config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
Handle any bit position and use mode QISI.
* config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
of 2 insns for bit-transfer of respective style.
gcc/testsuite/
PR target/82931
* gcc.target/avr/pr82931.c: New test.
Diffstat (limited to 'gcc/fortran')
0 files changed, 0 insertions, 0 deletions