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| author | Roger Sayle <roger@nextmovesoftware.com> | 2020-07-06 07:46:52 +0100 |
|---|---|---|
| committer | Roger Sayle <roger@nextmovesoftware.com> | 2020-07-06 07:46:52 +0100 |
| commit | e6f323372efa29091cf052a276c15b9e6ebc00ae (patch) | |
| tree | 91c29733a9092d427fcb4bd44c9015f68d3e72c9 /gcc/fortran | |
| parent | cf2bfc7c8013b7fc72ec5f104156fce736c2b3e1 (diff) | |
| download | gcc-e6f323372efa29091cf052a276c15b9e6ebc00ae.zip gcc-e6f323372efa29091cf052a276c15b9e6ebc00ae.tar.gz gcc-e6f323372efa29091cf052a276c15b9e6ebc00ae.tar.bz2 | |
nvptx: Add support for vadd.add and vsub.add instructions.
The following patch adds support for three-input addition instructions to
the nvptx backend. The PTX ISA's "vadd.u32.u32.u32.add d, a, b, c"
instruction effectively implements 32-bit d = a+b+c, and the
"vsub.u32.u32.u32 d,a,b,c" instruction that provides 32-bit d = (a-b)+c.
The hope is that these mnemonics help ptxas generate the low-level
hardware's IADD3 instruction.
2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog:
* config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
(*vsub_addsi4): New instruction.
gcc/testsuite/ChangeLog:
* gcc.target/nvptx/vadd_add.c: New test.
* gcc.target/nvptx/vsub_add.c: New test.
Diffstat (limited to 'gcc/fortran')
0 files changed, 0 insertions, 0 deletions