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authorChristoph Müllner <christoph.muellner@vrull.eu>2023-10-10 00:40:35 +0200
committerChristoph Müllner <christoph.muellner@vrull.eu>2023-10-12 18:15:28 +0200
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RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering
Fixes: c1bc7513b1d7 ("RISC-V: const: hide mvconst splitter from IRA") A recent change broke the xtheadcondmov-indirect tests, because the order of emitted instructions changed. Since the test is too strict when testing for a fixed instruction order, let's change the tests to simply count instruction, like it is done for similar tests. Reported-by: Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> gcc/testsuite/ChangeLog: * gcc.target/riscv/xtheadcondmov-indirect.c: Make robust against instruction reordering.
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