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| author | Richard Earnshaw <rearnsha@arm.com> | 2022-01-14 11:38:33 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2022-01-20 11:15:26 +0000 |
| commit | 997070498b0d713ecfb384dc12d1e68ebdbee5bd (patch) | |
| tree | 6f9cf4eab5d369e327645258120f2e6116946a93 /gcc/fortran | |
| parent | 2078550a005f3fde4c331ad4b8452c963c4cdb9d (diff) | |
| download | gcc-997070498b0d713ecfb384dc12d1e68ebdbee5bd.zip gcc-997070498b0d713ecfb384dc12d1e68ebdbee5bd.tar.gz gcc-997070498b0d713ecfb384dc12d1e68ebdbee5bd.tar.bz2 | |
arm: elide some cases where the AES erratum workaround is not required.
Some common cases where the AES erratum workaround are not required
are when there are 64- or 128-bit loads from memory, moving a 128-bit
value from core registers, and where a 128-bit constant is being
loaded from a literal pool. The loads may also be misaligned or
generated via a neon intrinsic function.
gcc/ChangeLog:
* config/arm/crypto.md (aes_op_protect): Allow moves from core
registers and from memory.
(aes_op_protect_misalign_load): New pattern.
(aes_op_protect_neon_vld1v16qi): New pattern.
Diffstat (limited to 'gcc/fortran')
0 files changed, 0 insertions, 0 deletions