arm: PR target/95646: Do not clobber callee saved registers with CMSE

As reported in bugzilla when the -mcmse option is used while compiling for size
(-Os) with a thumb-1 target the generated code will clear the registers r7-r10.
These however are callee saved and should be preserved accross ABI boundaries.
The reason this happens is because these registers are made "fixed" when
optimising for size with Thumb-1 in a way to make sure they are not used, as
pushing and popping hi-registers requires extra moves to and from LO_REGS.

To fix this, this patch uses 'callee_saved_reg_p', which accounts for this
optimisation, instead of 'call_used_or_fixed_reg_p'. Be aware of
'callee_saved_reg_p''s definition, as it does still take call used registers
into account, which aren't callee_saved in my opinion, so it is a rather
misnoemer, works in our advantage here though as it does exactly what we need.

Regression tested on arm-none-eabi.

Is this OK for trunk? (Will eventually backport to previous versions if stable.)

gcc/ChangeLog:
2020-06-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR target/95646
	* config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
	'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.

gcc/testsuite/ChangeLog:
2020-06-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR target/95646
	* gcc.target/arm/pr95646.c: New test.

0 files changed, 0 insertions, 0 deletions