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author | Fei Yang <felix.yang@huawei.com> | 2020-05-11 15:18:47 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2020-05-11 15:18:47 +0100 |
commit | 248e357f6941fe9409658386dc9b86b75dfd96c6 (patch) | |
tree | 86b3702b8559afab5603438ccf0436c89bf5d12e /gcc/fortran/trans-expr.c | |
parent | d572ad49217c09ca09e382774fdc6c407db4fc20 (diff) | |
download | gcc-248e357f6941fe9409658386dc9b86b75dfd96c6.zip gcc-248e357f6941fe9409658386dc9b86b75dfd96c6.tar.gz gcc-248e357f6941fe9409658386dc9b86b75dfd96c6.tar.bz2 |
aarch64: Fix ICE when expanding scalar floating move with -mgeneral-regs-only. [PR94991]
In the testcase for PR94991, we are doing FAIL for scalar floating move expand
pattern since TARGET_FLOAT is false with option -mgeneral-regs-only. But move
expand pattern cannot fail. It would be better to replace the FAIL with code
that bitcasts to the equivalent integer mode using gen_lowpart.
2020-05-11 Felix Yang <felix.yang@huawei.com>
gcc/
PR target/94991
* config/aarch64/aarch64.md (mov<mode>):
Bitcasts to the equivalent integer mode using gen_lowpart
instead of doing FAIL for scalar floating point move.
gcc/testsuite/
PR target/94991
* gcc.target/aarch64/mgeneral-regs_5.c: New test.
Diffstat (limited to 'gcc/fortran/trans-expr.c')
0 files changed, 0 insertions, 0 deletions