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| author | Tamar Christina <tamar.christina@arm.com> | 2021-07-26 10:22:23 +0100 |
|---|---|---|
| committer | Tamar Christina <tamar.christina@arm.com> | 2021-07-26 10:22:23 +0100 |
| commit | 2050ac1a547eebe7de4af98b57429a934e75fff4 (patch) | |
| tree | 48bd4189de691773b62c86b47c95d12ad313b0a4 /gcc/fortran/trans-expr.c | |
| parent | acf9d1fd806fabf62dfe232439b11263c191e32d (diff) | |
| download | gcc-2050ac1a547eebe7de4af98b57429a934e75fff4.zip gcc-2050ac1a547eebe7de4af98b57429a934e75fff4.tar.gz gcc-2050ac1a547eebe7de4af98b57429a934e75fff4.tar.bz2 | |
AArch64: correct usdot vectorizer and intrinsics optabs
There's a slight mismatch between the vectorizer optabs and the intrinsics
patterns for NEON. The vectorizer expects operands[3] and operands[0] to be
the same but the aarch64 intrinsics expanders expect operands[0] and
operands[1] to be the same.
This means we need different patterns here. This adds a separate usdot
vectorizer pattern which just shuffles around the RTL params.
There's also an inconsistency between the usdot and (u|s)dot intrinsics RTL
patterns which is not corrected here.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.c (TYPES_TERNOP_SUSS,
aarch64_types_ternop_suss_qualifiers): New.
* config/aarch64/aarch64-simd-builtins.def (usdot_prod): Use it.
* config/aarch64/aarch64-simd.md (usdot_prod<vsi2qi>): Re-organize RTL.
* config/aarch64/arm_neon.h (vusdot_s32, vusdotq_s32): Use it.
Diffstat (limited to 'gcc/fortran/trans-expr.c')
0 files changed, 0 insertions, 0 deletions