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author | Vineet Gupta <vineetg@rivosinc.com> | 2023-05-09 16:22:08 -0700 |
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committer | Vineet Gupta <vineetg@rivosinc.com> | 2023-05-19 10:18:58 -0700 |
commit | c104ef4b5eb1f781bbef953e3c282ef1ca94c4f1 (patch) | |
tree | 800268e826c95063bad1c56b435b83d28eaddee8 /gcc/fortran/resolve.cc | |
parent | c5709fc87131bea0013cb67cf80bdea6e238c918 (diff) | |
download | gcc-c104ef4b5eb1f781bbef953e3c282ef1ca94c4f1.zip gcc-c104ef4b5eb1f781bbef953e3c282ef1ca94c4f1.tar.gz gcc-c104ef4b5eb1f781bbef953e3c282ef1ca94c4f1.tar.bz2 |
RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]
[part #2 of PR/109279]
SPEC2017 deepsjeng uses large constants which currently generates less than
ideal code. This fix improves codegen for large constants which have
same low and hi parts: e.g.
long long f(void) { return 0x0101010101010101ull; }
Before
li a5,0x1010000
addi a5,a5,0x101
mv a0,a5
slli a5,a5,32
add a0,a5,a0
ret
With patch
li a5,0x1010000
addi a5,a5,0x101
slli a0,a5,32
add a0,a0,a5
ret
This is testsuite clean.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_split_integer): if loval is equal
to hival, ASHIFT the corresponding regs.
Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
Diffstat (limited to 'gcc/fortran/resolve.cc')
0 files changed, 0 insertions, 0 deletions