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| author | Uros Bizjak <uros@gcc.gnu.org> | 2011-08-25 19:05:34 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2011-08-25 19:05:34 +0200 |
| commit | a02f398da4c49e7c9f6fc8bed2da4edcf9b834a8 (patch) | |
| tree | 2c867549710477ec586e5824aef0b170a9471c25 /gcc/fortran/resolve.c | |
| parent | aa13dc3c9342c5857bdf3d2f6ce6c3af6d4fae9c (diff) | |
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i386.md (isa): Add sse2, sse2_noavx, sse3, sse4 and sse4_noavx.
* config/i386/i386.md (isa): Add sse2, sse2_noavx, sse3,
sse4 and sse4_noavx.
(enabled): Handle sse2, sse2_noavx, sse3, sse4 and sse4_noavx.
(*pushdf_rex64): Change Y2 register constraint to x.
(*movdf_internal_rex64): Ditto.
(*zero_extendsidi2_rex64): Ditto.
(*movdi_internal): Change Y2 register constraint to x
and update "isa" attribute.
(*pushdf): Ditto.
(*movdf internal): Ditto.
(zero_extendsidi2_1): Ditto.
(*truncdfdf_mixed): Ditto.
(*truncxfdf2_mixed): Ditto.
* config/i386/mmx.md (*mov<mode>_internal_rex64): Change Y2
register constraint to x.
(*movv2sf_internal_rex64): Ditto.
(*mov<mode>_internal): Change Y2 register constraint to x
and add "isa" attribute.
(*movv2sf_internal): Ditto.
(*vec_extractv2si_1): Ditto.
* config/i386/sse.md ("vec_set<mode>_0): Change Y2 and Y4 register
constraints to x and update "isa" attribute.
(*vec_interleave_highv2df): Change Y3 registerconstraint
to x and update "isa" attribute.
(*vec_interleave_lowv2df): Ditto.
(*vec_concatv2df): Change Y2 register constraint to x and
update "isa" attribute.
(sse2_loadld): Ditto.
(*vec_extractv2di_1): Ditto.
(*vec_dupv4si): Ditto.
(*vec_dupv2di): Ditto.
(*vec_concatv4si): Ditto.
(vec_concatv2di): Ditto.
* config/i386/constraints.md (Y2): Remove.
(Y3): Ditto.
(Y4): Ditto.
From-SVN: r178073
Diffstat (limited to 'gcc/fortran/resolve.c')
0 files changed, 0 insertions, 0 deletions