x86: Don't set AVX_U128_DIRTY when zeroing YMM/ZMM register

There is no SSE <-> AVX transition penalty if the upper bits of YMM/ZMM
registers are unchanged and YMM/ZMM store doesn't change the upper bits
of YMM/ZMM registers.

1. Since zeroing YMM/ZMM register is implemented with zeroing XMM
register, don't set AVX_U128_DIRTY when zeroing YMM/ZMM register.
2. Since store doesn't change the INIT state on the upper bits of
YMM/ZMM register, don't set AVX_U128_DIRTY on store if the source
of store was never non-zero.

Here are the vzeroupper count differences on SPEC CPU 2017 with

-Ofast -march=skylake-avx512

                Before  After    Diff
500.perlbench_r	226	225	-0.44%
502.gcc_r      	1263	1103	-12.67%
503.bwaves_r   	14	14	0.00%
505.mcf_r      	29	28	-3.45%
507.cactuBSSN_r	4651	4628	-0.49%
508.namd_r     	433	432	-0.23%
510.parest_r   	20380	19347	-5.07%
511.povray_r   	495	452	-8.69%
519.lbm_r      	2	2	0.00%
520.omnetpp_r  	5954	5677	-4.65%
521.wrf_r      	12353	12339	-0.11%
523.xalancbmk_r	13137	13001	-1.04%
525.x264_r     	192	191	-0.52%
526.blender_r  	2515	2366	-5.92%
527.cam4_r     	4601	4583	-0.39%
531.deepsjeng_r	20	19	-5.00%
538.imagick_r  	898	805	-10.36%
541.leela_r    	427	399	-6.56%
544.nab_r      	74	74	0.00%
548.exchange2_r	72	72	0.00%
549.fotonik3d_r	318	318	0.00%
554.roms_r     	558	554	-0.72%
557.xz_r       	79	52	-34.18%

and performance differences are within noise range.

gcc/

	PR target/101456
	* config/i386/i386.c (ix86_avx_u128_mode_needed): Don't set
	AVX_U128_DIRTY when all bits are zero.

gcc/testsuite/

	PR target/101456
	* gcc.target/i386/pr101456-1.c: New test.
	* gcc.target/i386/pr101456-2.c: Likewise.

0 files changed, 0 insertions, 0 deletions