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| author | David Edelsohn <dje.gcc@gmail.com> | 2021-11-05 20:33:45 -0400 |
|---|---|---|
| committer | David Edelsohn <dje.gcc@gmail.com> | 2021-11-06 11:48:46 -0400 |
| commit | 6b8152b96c114f038d2ef3fc753593c414b8cdb6 (patch) | |
| tree | 0ec35f4e32a7e933f8446943293edb06f704b91c /gcc/fortran/decl.c | |
| parent | 4856699eeb2809c50930bafe341a96470877195d (diff) | |
| download | gcc-6b8152b96c114f038d2ef3fc753593c414b8cdb6.zip gcc-6b8152b96c114f038d2ef3fc753593c414b8cdb6.tar.gz gcc-6b8152b96c114f038d2ef3fc753593c414b8cdb6.tar.bz2 | |
powerpc: Fix vsx_splat_v4si in 32 bit mode
Tamar's recent patch to teach CSE to perform vector extract exercises
VSX splat more frequently, which exposed a constraint error for the
vsx_splat patterns. The pattern could be created for Power9, but
the "we constraint only provided alternatives in 64 bit mode. The
instructions are valid in 32 bit mode and SImode is allowed in VSX
registers. This patch updates the constraints from "we" to "wa" to
allow the pattern and fix the failing testcases.
gcc/ChangeLog:
* config/rs6000/vsx.md (vsx_splat_v4si): Change constraints to "wa".
(vsx_splat_v4si_di): Change constraint to "wa".
Diffstat (limited to 'gcc/fortran/decl.c')
0 files changed, 0 insertions, 0 deletions