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| author | Pan Li <pan2.li@intel.com> | 2023-08-16 14:18:35 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-08-16 15:03:44 +0800 |
| commit | 567258f057913229084c21396b84c219f3fef05d (patch) | |
| tree | 4d1a9ee7b974b0265d5ec1bfdc7be164ccb35787 /gcc/fold-const.cc | |
| parent | d471bdb0453de7b738f49148b66d57cb5871937d (diff) | |
| download | gcc-567258f057913229084c21396b84c219f3fef05d.zip gcc-567258f057913229084c21396b84c219f3fef05d.tar.gz gcc-567258f057913229084c21396b84c219f3fef05d.tar.bz2 | |
RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFCVT.XU.F.V as the below samples.
* __riscv_vfcvt_xu_f_v_u32m1_rm
* __riscv_vfcvt_xu_f_v_u32m1_rm_m
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(BASE): New declaration.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfcvt_xu_frm): New intrinsic function def..
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-cvt-xu.c: New test.
Diffstat (limited to 'gcc/fold-const.cc')
0 files changed, 0 insertions, 0 deletions