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| author | Pan Li <pan2.li@intel.com> | 2023-08-16 15:55:42 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-08-16 17:55:37 +0800 |
| commit | 1b7418ba1baf0d43fff6c6a68b8134813a35c1d9 (patch) | |
| tree | be2fd47b793a3d20265ac0e90fd48b674946e6a3 /gcc/fold-const.cc | |
| parent | ac6b74e9a5a40c28aeb715f43d117a7c4d32f43f (diff) | |
| download | gcc-1b7418ba1baf0d43fff6c6a68b8134813a35c1d9.zip gcc-1b7418ba1baf0d43fff6c6a68b8134813a35c1d9.tar.gz gcc-1b7418ba1baf0d43fff6c6a68b8134813a35c1d9.tar.bz2 | |
RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFWCVT.X.F.V as the below samples.
* __riscv_vfwcvt_xu_f_v_u64m2_rm
* __riscv_vfwcvt_xu_f_v_u64m2_rm_m
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(BASE): New declaration.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfwcvt_xu_frm): New intrinsic function def.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-wcvt-xu.c: New test.
Diffstat (limited to 'gcc/fold-const.cc')
0 files changed, 0 insertions, 0 deletions