diff options
| author | liuhongt <hongtao.liu@intel.com> | 2020-11-03 17:26:43 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2020-12-03 13:34:05 +0800 |
| commit | 35c4c67e6c534ef3d6ba7a7752ab7e0fbc91755b (patch) | |
| tree | bd33eff8b8bc3f3d5576fb479255793896a38fb1 /gcc/fold-const.c | |
| parent | c03a78d8f8cac3019e7bc67b6ae39f4edc61cf2c (diff) | |
| download | gcc-35c4c67e6c534ef3d6ba7a7752ab7e0fbc91755b.zip gcc-35c4c67e6c534ef3d6ba7a7752ab7e0fbc91755b.tar.gz gcc-35c4c67e6c534ef3d6ba7a7752ab7e0fbc91755b.tar.bz2 | |
Fix incorrect replacement of vmovdqu32 with vpblendd which can cause fault.
gcc/ChangeLog:
PR target/97642
* config/i386/i386-expand.c
(ix86_expand_special_args_builtin): Don't move all-ones mask
operands into register.
* config/i386/sse.md (UNSPEC_MASKLOAD): New unspec.
(*<avx512>_load<mode>_mask): New define_insns for masked load
instructions.
(<avx512>_load<mode>_mask): Changed to define_expands which
specifically handle memory or all-ones mask operands.
(<avx512>_blendm<mode>): Changed to define_insns which are same
as original <avx512>_load<mode>_mask with adjustment of
operands order.
(*<avx512>_load<mode>): New define_insn_and_split which is
used to optimize for masked load with all one mask.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512bw-vmovdqu16-1.c: Adjust testcase to
make sure only masked load instruction is generated.
* gcc.target/i386/avx512bw-vmovdqu8-1.c: Ditto.
* gcc.target/i386/avx512f-vmovapd-1.c: Ditto.
* gcc.target/i386/avx512f-vmovaps-1.c: Ditto.
* gcc.target/i386/avx512f-vmovdqa32-1.c: Ditto.
* gcc.target/i386/avx512f-vmovdqa64-1.c: Ditto.
* gcc.target/i386/avx512vl-vmovapd-1.c: Ditto.
* gcc.target/i386/avx512vl-vmovaps-1.c: Ditto.
* gcc.target/i386/avx512vl-vmovdqa32-1.c: Ditto.
* gcc.target/i386/avx512vl-vmovdqa64-1.c: Ditto.
* gcc.target/i386/pr97642-1.c: New test.
* gcc.target/i386/pr97642-2.c: New test.
Diffstat (limited to 'gcc/fold-const.c')
0 files changed, 0 insertions, 0 deletions