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| author | Hongyu Wang <hongyu.wang@intel.com> | 2021-10-25 17:00:46 +0800 |
|---|---|---|
| committer | Hongyu Wang <hongyu.wang@intel.com> | 2021-10-28 09:51:00 +0800 |
| commit | 5720c450fab749664b32dbcd14d0a66f8ba57e5f (patch) | |
| tree | e8a0e1d2079122f76df5dc6142558b3f7b3d5c49 /gcc/fold-const.c | |
| parent | 04a2cf3fd65c21e9099edea462c22446fa72d398 (diff) | |
| download | gcc-5720c450fab749664b32dbcd14d0a66f8ba57e5f.zip gcc-5720c450fab749664b32dbcd14d0a66f8ba57e5f.tar.gz gcc-5720c450fab749664b32dbcd14d0a66f8ba57e5f.tar.bz2 | |
AVX512FP16: Optimize _Float16 reciprocal for div and sqrt
For _Float16 type, add insn and expanders to optimize x / y to
x * rcp (y), and x / sqrt (y) to x * rsqrt (y).
As Half float only have minor precision difference between div and
mul * rcp, there is no need for Newton-Rhapson approximation.
gcc/ChangeLog:
* config/i386/i386.c (use_rsqrt_p): Add mode parameter, enable
HFmode rsqrt without TARGET_SSE_MATH.
(ix86_optab_supported_p): Refactor rint, adjust floor, ceil,
btrunc condition to be restricted by -ftrapping-math, adjust
use_rsqrt_p function call.
* config/i386/i386.md (rcphf2): New define_insn.
(rsqrthf2): Likewise.
* config/i386/sse.md (div<mode>3): Change VF2H to VF2.
(div<mode>3): New expander for HF mode.
(rsqrt<mode>2): Likewise.
(*avx512fp16_vmrcpv8hf2): New define_insn for rpad pass.
(*avx512fp16_vmrsqrtv8hf2): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512fp16-recip-1.c: New test.
* gcc.target/i386/avx512fp16-recip-2.c: Ditto.
* gcc.target/i386/pr102464.c: Add -fno-trapping-math.
Diffstat (limited to 'gcc/fold-const.c')
0 files changed, 0 insertions, 0 deletions