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authorSteve Chamberlain <sac@gnu.org>1994-04-20 05:55:28 +0000
committerSteve Chamberlain <sac@gnu.org>1994-04-20 05:55:28 +0000
commita0fbc3a981825bedcbe334a05d1ad0e05c5bd071 (patch)
tree4009dea4e3e9ba0ca614c064f8aaba6ab38b7c8a /gcc/flow.c
parentdcfb710401740899d37098f377d12f0a2135c6c5 (diff)
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*** empty log message ***
From-SVN: r7091
Diffstat (limited to 'gcc/flow.c')
-rw-r--r--gcc/flow.c29
1 files changed, 16 insertions, 13 deletions
diff --git a/gcc/flow.c b/gcc/flow.c
index 74695a7..825ecb1 100644
--- a/gcc/flow.c
+++ b/gcc/flow.c
@@ -2148,16 +2148,16 @@ find_auto_inc (needed, x, insn)
reg_n_calls_crossed[regno]++;
}
- if (win)
+ if (win
+ /* If we have found a suitable auto-increment, do
+ POST_INC around the register here, and patch out the
+ increment instruction that follows. */
+ && validate_change (insn, &XEXP (x, 0),
+ gen_rtx ((INTVAL (XEXP (y, 1)) == size
+ ? (offset ? PRE_INC : POST_INC)
+ : (offset ? PRE_DEC : POST_DEC)),
+ Pmode, addr), 0))
{
- /* We have found a suitable auto-increment: do POST_INC around
- the register here, and patch out the increment instruction
- that follows. */
- XEXP (x, 0) = gen_rtx ((INTVAL (XEXP (y, 1)) == size
- ? (offset ? PRE_INC : POST_INC)
- : (offset ? PRE_DEC : POST_DEC)),
- Pmode, addr);
-
/* Record that this insn has an implicit side effect. */
REG_NOTES (insn)
= gen_rtx (EXPR_LIST, REG_INC, addr, REG_NOTES (insn));
@@ -2617,10 +2617,13 @@ try_pre_increment (insn, reg, amount)
if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
return 0;
- XEXP (use, 0) = gen_rtx (amount > 0
- ? (do_post ? POST_INC : PRE_INC)
- : (do_post ? POST_DEC : PRE_DEC),
- Pmode, reg);
+ /* See if this combination of instruction and addressing mode exists. */
+ if (! validate_change (insn, &XEXP (use, 0),
+ gen_rtx (amount > 0
+ ? (do_post ? POST_INC : PRE_INC)
+ : (do_post ? POST_DEC : PRE_DEC),
+ Pmode, reg), 0))
+ return 0;
/* Record that this insn now has an implicit side effect on X. */
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, reg, REG_NOTES (insn));