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| author | Richard Henderson <rth@gcc.gnu.org> | 2000-07-30 16:58:03 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2000-07-30 16:58:03 -0700 |
| commit | 5527bf14a5a334ea3509a3dd927b070bc92fb363 (patch) | |
| tree | f605097b66b55020e4f570dfecd70e09c3318697 /gcc/final.c | |
| parent | 1cf0acdd19587bcfc635db6688b6a7143f0cadfe (diff) | |
| download | gcc-5527bf14a5a334ea3509a3dd927b070bc92fb363.zip gcc-5527bf14a5a334ea3509a3dd927b070bc92fb363.tar.gz gcc-5527bf14a5a334ea3509a3dd927b070bc92fb363.tar.bz2 | |
Makefile.in (OBJS): Add doloop.o.
* Makefile.in (OBJS): Add doloop.o.
* doloop.c: New file.
* final.c (insn_current_reference_address): Return 0 before final.
* flags.h (flag_branch_on_count_reg): Fix typos in commentary.
* jump.c (any_uncondjump_p): Likewise.
* loop.c (indirect_jump_in_function): Make static.
(strength_reduce): Call doloop_optimize.
(insert_bct, instrument_loop_bct): Remove.
* loop.h (doloop_optimize): Prototype.
* recog.c (split_all_insns): Split all INSN_P.
* toplev.c (flag_branch_on_count_reg): Default on.
* config/c4x/c4x.c (c4x_optimization_options): Don't set
flag_branch_on_count_reg.
* config/i386/i386.c (override_options): Likewise.
* config/rs6000/rs6000.c (optimization_options): Likewise.
* config/i386/i386.md (decrement_and_branch_on_count): Remove.
(doloop_end): New.
(dbra_ge): Remove, as well as all it's splitters.
* config/rs6000/rs6000.md (decrement_and_branch_on_count): Remove.
(doloop_end): New.
* config/ia64/ia64-protos.h (ar_lc_reg_operand): Declare.
(ia64_register_move_cost): Declare.
* config/ia64/ia64.c (ar_lc_reg_operand): New.
(struct ia64_frame_info): Add ar_size.
(ia64_compute_frame_size): Set it.
(save_restore_insns): Save and restore ar.lc.
(ia64_register_move_cost): New, moved from header file. Handle
application registers.
(REG_AR_PFS, REG_AR_EC): Remove. Replace with AR_*_REGNUM numbers.
(emit_insn_group_barriers): Special case doloop_end_internal.
(ia64_epilogue_uses): Mark ar.lc live at end.
* config/ia64/ia64.h (AR_CCV_REGNUM, AR_LC_REGNUM): New registers.
(AR_EC_REGNUM, AR_PFS_REGNUM): New registers.
(FIRST_PSEUDO_REGISTER): Make room.
(AR_M_REGNO_P, AR_I_REGNO_P, AR_REGNO_P): New.
(FIXED_REGISTERS, CALL_USED_REGISTERS): Update.
(REG_ALLOC_ORDER): Update.
(HARD_REGNO_MODE_OK): Update.
(REGISTER_NAMES): Update.
(enum reg_class): Add AR_M_REGS and AR_I_REGS.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update.
(REGNO_REG_CLASS): Update.
(LEGITIMATE_ADDRESS_DISP): Displacement range is 9 bits, not 10.
(REGISTER_MOVE_COST): Move out of line.
(PREDICATE_CODES): Update.
* config/ia64/ia64.md (movdi patterns): Handle ar register classes.
(addsi3_plus1_alt, adddi3_plus1_alt): New.
(shladd_elim splitter): Allow constants in the predicate.
(doloop_end, doloop_end_internal): New.
From-SVN: r35358
Diffstat (limited to 'gcc/final.c')
| -rw-r--r-- | gcc/final.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/gcc/final.c b/gcc/final.c index 1fc72c9..7bdd403 100644 --- a/gcc/final.c +++ b/gcc/final.c @@ -918,9 +918,14 @@ int insn_current_reference_address (branch) rtx branch; { - rtx dest; - rtx seq = NEXT_INSN (PREV_INSN (branch)); - int seq_uid = INSN_UID (seq); + rtx dest, seq; + int seq_uid; + + if (! INSN_ADDRESSES_SET_P ()) + return 0; + + seq = NEXT_INSN (PREV_INSN (branch)); + seq_uid = INSN_UID (seq); if (GET_CODE (branch) != JUMP_INSN) /* This can happen for example on the PA; the objective is to know the offset to address something in front of the start of the function. @@ -929,6 +934,7 @@ insn_current_reference_address (branch) any alignment we'd encounter, so we skip the call to align_fuzz. */ return insn_current_address; dest = JUMP_LABEL (branch); + /* BRANCH has no proper alignment chain set, so use SEQ. */ if (INSN_SHUID (branch) < INSN_SHUID (dest)) { |