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author | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | 2023-03-08 11:18:56 +0800 |
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committer | Kito Cheng <kito.cheng@sifive.com> | 2023-03-10 16:24:23 +0800 |
commit | ab7bb445ee586258a6210462e92ed196d61beb9e (patch) | |
tree | 24b7ac55b1b5f6d0d2c9aeceec6f4fb056f96392 /gcc/file-prefix-map.h | |
parent | 2dc73876fc9a0df4c3af2766319402d14d39db33 (diff) | |
download | gcc-ab7bb445ee586258a6210462e92ed196d61beb9e.zip gcc-ab7bb445ee586258a6210462e92ed196d61beb9e.tar.gz gcc-ab7bb445ee586258a6210462e92ed196d61beb9e.tar.bz2 |
RISC-V: Fine tune merge operand constraint for integer/load/store
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
patterns according to RVV ISA.
* config/riscv/vector-iterators.md: New iterators.
* config/riscv/vector.md
(@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
(@pred_indexed_<order>load<mode>_same_eew): New pattern.
(@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
(@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
(@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
(@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
(@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
(@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
(@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
(@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
(@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
(@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
(@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
(@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/merge_constraint-1.c: New test.
Diffstat (limited to 'gcc/file-prefix-map.h')
0 files changed, 0 insertions, 0 deletions