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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2023-06-06 09:56:52 +0100
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>2023-06-06 09:56:52 +0100
commitd2cdfafde2060ba2a96b01da223fe33c67439b94 (patch)
tree5235c6b2496f6361832be64d1fc783ff4daac4e1 /gcc/expr.cc
parentb327cbe8f4eefc91ee2bea49a1da7128adf30281 (diff)
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aarch64: Simplify SHRN, RSHRN expanders and patterns
Now that we've got the <vczle><vczbe> annotations we can get rid of explicit !BYTES_BIG_ENDIAN and BYTES_BIG_ENDIAN patterns for the narrowing shift instructions. This allows us to clean up the expanders as well. Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf. gcc/ChangeLog: * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete. (aarch64_shrn<mode>_insn_be): Delete. (*aarch64_<srn_op>shrn<mode>_vect): Rename to... (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This. (aarch64_shrn<mode>): Remove reference to the above deleted patterns. (aarch64_rshrn<mode>_insn_le): Delete. (aarch64_rshrn<mode>_insn_be): Delete. (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn. (aarch64_rshrn<mode>): Remove references to the above deleted patterns. gcc/testsuite/ChangeLog: * gcc.target/aarch64/simd/pr99195_5.c: Add testing for shrn_n, rshrn_n intrinsics.
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