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| author | Eric Botcazou <ebotcazou@adacore.com> | 2023-03-14 10:39:11 +0100 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@adacore.com> | 2023-03-14 11:29:48 +0100 |
| commit | 8b6c38ef6a7a8cc1f7cc2ff86a686e07ceab1641 (patch) | |
| tree | 3bb1d5897c69cdbb43f85b5577925c60a0668ce7 /gcc/expr.cc | |
| parent | 4d771291f70dab571e7c18f9f5f8af4f27737244 (diff) | |
| download | gcc-8b6c38ef6a7a8cc1f7cc2ff86a686e07ceab1641.zip gcc-8b6c38ef6a7a8cc1f7cc2ff86a686e07ceab1641.tar.gz gcc-8b6c38ef6a7a8cc1f7cc2ff86a686e07ceab1641.tar.bz2 | |
Revert latest change to emit_group_store
This pessimizes on targets with insv instructions.
gcc/
PR rtl-optimization/107762
* expr.cc (emit_group_store): Revert latest change.
Diffstat (limited to 'gcc/expr.cc')
| -rw-r--r-- | gcc/expr.cc | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/gcc/expr.cc b/gcc/expr.cc index 78d3529..f8f5cc5 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -2902,16 +2902,14 @@ emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, dst = gen_reg_rtx (outer); /* Make life a bit easier for combine: if the first element of the - vector is the word (or larger) low part of the destination mode, - use a paradoxical subreg to initialize the destination. */ + vector is the low part of the destination mode, use a paradoxical + subreg to initialize the destination. */ if (start < finish) { inner = GET_MODE (tmps[start]); bytepos = subreg_lowpart_offset (inner, outer); - if (known_ge (GET_MODE_BITSIZE (inner), BITS_PER_WORD) - && known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, - start), 1)), - bytepos)) + if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, start), 1)), + bytepos)) { temp = simplify_gen_subreg (outer, tmps[start], inner, 0); if (temp) @@ -2929,10 +2927,9 @@ emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, { inner = GET_MODE (tmps[finish - 1]); bytepos = subreg_lowpart_offset (inner, outer); - if (known_ge (GET_MODE_BITSIZE (inner), BITS_PER_WORD) - && known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, - finish - 1), 1)), - bytepos)) + if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, + finish - 1), 1)), + bytepos)) { temp = simplify_gen_subreg (outer, tmps[finish - 1], inner, 0); if (temp) |