diff options
| author | Hongyu Wang <hongyu.wang@intel.com> | 2023-12-02 12:55:59 +0800 |
|---|---|---|
| committer | Hongyu Wang <hongyu.wang@intel.com> | 2023-12-07 09:32:33 +0800 |
| commit | 3ba505c7b17a208b1c546b7a974a02e8003b60ef (patch) | |
| tree | 5dcf2da1b985bf2288fc45f6cb94ae9f8a9d6814 /gcc/expr.cc | |
| parent | 42cb34f94b1b6e78624320b0d5b564c8aa7bb030 (diff) | |
| download | gcc-3ba505c7b17a208b1c546b7a974a02e8003b60ef.zip gcc-3ba505c7b17a208b1c546b7a974a02e8003b60ef.tar.gz gcc-3ba505c7b17a208b1c546b7a974a02e8003b60ef.tar.bz2 | |
[APX NDD] Support TImode shift for NDD
For TImode shifts, they are splitted by splitter functions, which assume
operands[0] and operands[1] to be the same. For the NDD alternative the
assumption may not be true so add split functions for NDD to emit the NDD
form instructions, and omit the handling of !64bit target split.
Although the NDD form allows memory src, for post-reload splitter there are
no extra register to accept NDD form shift, especially shld/shrd. So only
accept register alternative for shift src under NDD.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_split_ashl_ndd): New
function to split NDD form lshift.
(ix86_split_rshift_ndd): Likewise for l/ashiftrt.
* config/i386/i386-protos.h (ix86_split_ashl_ndd): New
prototype.
(ix86_split_rshift_ndd): Likewise.
* config/i386/i386.md (ashl<mode>3_doubleword): Add NDD
alternative, call ndd split function when operands[0]
not equal to operands[1].
(define_split for doubleword lshift): Likewise.
(define_peephole for doubleword lshift): Likewise.
(<insn><mode>3_doubleword): Likewise for l/ashiftrt.
(define_split for doubleword l/ashiftrt): Likewise.
(define_peephole for doubleword l/ashiftrt): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/i386/apx-ndd-ti-shift.c: New test.
Diffstat (limited to 'gcc/expr.cc')
0 files changed, 0 insertions, 0 deletions