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authorPan Li <pan2.li@intel.com>2023-11-29 14:31:30 +0800
committerPan Li <pan2.li@intel.com>2023-11-29 14:50:29 +0800
commit25a51e98fdd504826a40775a5e5b9ffb336b5aa1 (patch)
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parent4ed0740c6e807460ce79a351094329fdeb551545 (diff)
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RISC-V: Bugfix for ICE in block move when zve32f
The exact_div requires the exactly multiple of the divider. Unfortunately, the condition will be broken when zve32f in some cases. For example, potential_ew is 8 BYTES_PER_RISCV_VECTOR * lmul1 is [4, 4] This patch would like to ensure the precondition of exact_div when get_vec_mode. PR target/112743 gcc/ChangeLog: * config/riscv/riscv-string.cc (expand_block_move): Add precondition check for exact_div. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr112743-1.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
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