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| author | Andrew Pinski <quic_apinski@quicinc.com> | 2024-07-22 15:39:37 -0700 |
|---|---|---|
| committer | Andrew Pinski <quic_apinski@quicinc.com> | 2024-07-26 09:55:07 -0700 |
| commit | 795021d9bc8546ccc51bacc899b6077c6928067b (patch) | |
| tree | f46a6ccae66ae5f7f7ac9d643dbd9ed60afc122c /gcc/expr.cc | |
| parent | 7e8e8a745a0f3389c2ef7de5798932f5ac0f8c9d (diff) | |
| download | gcc-795021d9bc8546ccc51bacc899b6077c6928067b.zip gcc-795021d9bc8546ccc51bacc899b6077c6928067b.tar.gz gcc-795021d9bc8546ccc51bacc899b6077c6928067b.tar.bz2 | |
aarch64: sve: Rename aarch64_bic to standard pattern, andn
Now there is an optab for bic, andn since r15-1890-gf379596e0ba99d.
This moves aarch64_bic for sve over to use it instead.
Note unlike the simd bic patterns, the operands were already
in the order that was expected for the optab so no swapping
was needed.
Built and tested on aarch64-linux-gnu with no regressions.
gcc/ChangeLog:
* config/aarch64/aarch64-sve-builtins-base.cc (svbic_impl::expand): Update
to use andn optab instead of using code_for_aarch64_bic.
* config/aarch64/aarch64-sve.md (@aarch64_bic<mode>): Rename to ...
(andn<mode>3): This.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Diffstat (limited to 'gcc/expr.cc')
0 files changed, 0 insertions, 0 deletions