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authorPan Li <pan2.li@intel.com>2024-07-26 17:00:13 +0800
committerPan Li <pan2.li@intel.com>2024-07-27 11:21:48 +0800
commit6d79d53eed82b1df378998bd4ced88644dcde200 (patch)
tree334f79af2921bc92bf7ff00f173999eab15d635e /gcc/expr.cc
parent4d1f71d49e396cb879d43dc96dc591079af66bbe (diff)
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Match: Support .SAT_SUB with IMM op for form 1-4
This patch would like to support .SAT_SUB when one of the op is IMM. Aka below 1-4 forms. Form 1: #define DEF_SAT_U_SUB_IMM_FMT_1(T, IMM) \ T __attribute__((noinline)) \ sat_u_sub_imm##IMM##_##T##_fmt_1 (T y) \ { \ return IMM >= y ? IMM - y : 0; \ } Form 2: #define DEF_SAT_U_SUB_IMM_FMT_2(T, IMM) \ T __attribute__((noinline)) \ sat_u_sub_imm##IMM##_##T##_fmt_2 (T y) \ { \ return IMM > y ? IMM - y : 0; \ } Form 3: #define DEF_SAT_U_SUB_IMM_FMT_3(T, IMM) \ T __attribute__((noinline)) \ sat_u_sub_imm##IMM##_##T##_fmt_3 (T x) \ { \ return x >= IMM ? x - IMM : 0; \ } Form 4: #define DEF_SAT_U_SUB_IMM_FMT_4(T, IMM) \ T __attribute__((noinline)) \ sat_u_sub_imm##IMM##_##T##_fmt_4 (T x) \ { \ return x > IMM ? x - IMM : 0; \ } Take below form 1 as example: DEF_SAT_U_SUB_OP0_IMM_FMT_1(uint32_t, 11) Before this patch: 4 │ __attribute__((noinline)) 5 │ uint64_t sat_u_sub_imm11_uint64_t_fmt_1 (uint64_t y) 6 │ { 7 │ uint64_t _1; 8 │ uint64_t _3; 9 │ 10 │ ;; basic block 2, loop depth 0 11 │ ;; pred: ENTRY 12 │ if (y_2(D) <= 11) 13 │ goto <bb 3>; [50.00%] 14 │ else 15 │ goto <bb 4>; [50.00%] 16 │ ;; succ: 3 17 │ ;; 4 18 │ 19 │ ;; basic block 3, loop depth 0 20 │ ;; pred: 2 21 │ _3 = 11 - y_2(D); 22 │ ;; succ: 4 23 │ 24 │ ;; basic block 4, loop depth 0 25 │ ;; pred: 2 26 │ ;; 3 27 │ # _1 = PHI <0(2), _3(3)> 28 │ return _1; 29 │ ;; succ: EXIT 30 │ 31 │ } After this patch: 4 │ __attribute__((noinline)) 5 │ uint64_t sat_u_sub_imm11_uint64_t_fmt_1 (uint64_t y) 6 │ { 7 │ uint64_t _1; 8 │ 9 │ ;; basic block 2, loop depth 0 10 │ ;; pred: ENTRY 11 │ _1 = .SAT_SUB (11, y_2(D)); [tail call] 12 │ return _1; 13 │ ;; succ: EXIT 14 │ 15 │ } The below test suites are passed for this patch: 1. The rv64gcv fully regression tests. 2. The x86 bootstrap tests. 3. The x86 fully regression tests. gcc/ChangeLog: * match.pd: Add case 9 and case 10 for .SAT_SUB when one of the op is IMM. Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc/expr.cc')
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