[to-be-committed,RISC-V] Handle zero_extract destination for single bit insertions

Combine will use zero_extract destinations for certain bitfield
insertions.  If the bitfield is a single bit constant, then we can use
bset/bclr.

In this case we are only dealing with word_mode objects, so we don't
have to worry about the SI->DI extension issues for TARGET_64BIT.

The testcase was derived from 502.gcc in spec from the RAU team.

An earlier version of this (TARGET_64BIT only) went through Ventana's CI
system.  This version has gone though mine after generalizing it to
handle rv32 as well.  I'll wait for pre-commit CI to render its verdict
before moving forward.

gcc/
	* config/riscv/bitmanip.md (bsetclr_zero_extract): New pattern.

gcc/testsuite/

	* gcc.target/riscv/zbs-zext-3.c: New test.

0 files changed, 0 insertions, 0 deletions