RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool[2-64]_t

This patch support the RVV VREINTERPRET from the int to the
vbool[2|4|8|16|32|64]_t.  Aka:

vbool[2|4|8|16|32|64]_t __riscv_vreinterpret_x_x(v{u}int[8|16|32|64]_t);

These APIs help the users to convert vector LMUL=1 integer to
vbool[2-64]_t.  According to the RVV intrinsic SPEC as below,
the reinterpret intrinsics only change the types of the underlying
contents.

https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md#reinterpret-vbool-o-vintm1

For example, given below code.
vbool64_t test_vreinterpret_v_u8m1_b64 (vuint8m1_t src) {
  return __riscv_vreinterpret_v_u8m1_b64 (src);
}

It will generate the assembly code similar as below:
vsetvli a5,zero,e8,mf8,ta,ma
vlm.v   v1,0(a1)
vsm.v   v1,0(a0)
ret

Please NOTE the test files doesn't cover all the possible combinations
of the intrinsic APIs introduced by this PATCH due to too many.
The reinterpret from vbool*_t to v{u}int*_t with lmul=1 will be coverred
int another PATCH.

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
	rest bool size, aka 2, 4, 8, 16, 32, 64.
	* config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
	Register vbool[2|4|8|16|32|64] interpret function.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
	New macro for vbool2_t.
	(DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
	(DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
	(DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
	(DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
	(DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
	(vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
	(vint16m1_t): Likewise.
	(vint32m1_t): Likewise.
	(vint64m1_t): Likewise.
	(vuint8m1_t): Likewise.
	(vuint16m1_t): Likewise.
	(vuint32m1_t): Likewise.
	(vuint64m1_t): Likewise.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
	New macro for vbool2_t.
	(DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
	(DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
	(DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
	(DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
	(DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
	(required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
	* config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
	vbool2_t interprect to base type.
	(bool4_interpret): Likewise.
	(bool8_interpret): Likewise.
	(bool16_interpret): Likewise.
	(bool32_interpret): Likewise.
	(bool64_interpret): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/misc_vreinterpret_vbool_vint.c: Add
	test cases for vbool[2|4|8|16|32|64]_t.

0 files changed, 0 insertions, 0 deletions