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| author | Hongyu Wang <hongyu.wang@intel.com> | 2023-10-25 16:26:49 +0800 |
|---|---|---|
| committer | Hongyu Wang <hongyu.wang@intel.com> | 2023-12-07 09:31:15 +0800 |
| commit | 16172db2dfc6307860c545aa95897b84d8e157e1 (patch) | |
| tree | 6cb9c2cd04040b918539c14da8cfe8914b5e24c9 /gcc/expr.cc | |
| parent | 03655cd427b9d8e3b06c950255332eb988b0ade1 (diff) | |
| download | gcc-16172db2dfc6307860c545aa95897b84d8e157e1.zip gcc-16172db2dfc6307860c545aa95897b84d8e157e1.tar.gz gcc-16172db2dfc6307860c545aa95897b84d8e157e1.tar.bz2 | |
[APX NDD] Support APX NDD for right shift insns
Similar to LSHIFT, rshift do not need to omit $1 for NDD form.
gcc/ChangeLog:
* config/i386/i386.md (ashr<mode>3_cvt): Extend with new
alternatives to support NDD, and adjust output templates.
(*ashr<mode>3_1): Likewise for SI/DI mode.
(*lshr<mode>3_1): Likewise.
(*<insn>si3_1_zext): Likewise.
(*ashr<mode>3_1): Likewise for QI/HI mode.
(*lshrqi3_1): Likewise.
(*lshrhi3_1): Likewise.
(<insn><mode>3_cmp): Likewise.
(*<insn><mode>3_cconly): Likewise.
(*ashrsi3_cvt_zext): Likewise, and use nonimmediate_operand for
operands[1] to accept memory input for NDD alternative.
(*highpartdisi2): Likewise.
(*<insn>si3_cmp_zext): Likewise.
(<insn><mode>3_carry): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/i386/apx-ndd.c: Add l/ashiftrt tests.
Diffstat (limited to 'gcc/expr.cc')
0 files changed, 0 insertions, 0 deletions