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author | Sandra Loosemore <sandra@codesourcery.com> | 2013-09-27 21:05:07 -0400 |
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committer | Sandra Loosemore <sandra@gcc.gnu.org> | 2013-09-27 21:05:07 -0400 |
commit | c6285bd7bbc2823f6146a30fe06a8b6b871a06d0 (patch) | |
tree | 3967a0cd7307647091f6146d6d906b34c15c329f /gcc/expr.c | |
parent | ec110af7d13b28fe77cf4c18647adfa1d4b8ea9c (diff) | |
download | gcc-c6285bd7bbc2823f6146a30fe06a8b6b871a06d0.zip gcc-c6285bd7bbc2823f6146a30fe06a8b6b871a06d0.tar.gz gcc-c6285bd7bbc2823f6146a30fe06a8b6b871a06d0.tar.bz2 |
expr.h (extract_bit_field): Remove packedp parameter.
2013-09-28 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* expr.h (extract_bit_field): Remove packedp parameter.
* expmed.c (extract_fixed_bit_field): Remove packedp parameter
from forward declaration.
(store_split_bit_field): Remove packedp arg from calls to
extract_fixed_bit_field.
(extract_bit_field_1): Remove packedp parameter and packedp
argument from recursive calls and calls to extract_fixed_bit_field.
(extract_bit_field): Remove packedp parameter and corresponding
arg to extract_bit_field_1.
(extract_fixed_bit_field): Remove packedp parameter. Remove code
to issue warnings.
(extract_split_bit_field): Remove packedp arg from call to
extract_fixed_bit_field.
* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
(copy_blkmode_from_reg): Likewise.
(copy_blkmode_to_reg): Likewise.
(read_complex_part): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
to extract_bit_field.
* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
call to extract_bit_field.
* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
call to extract_bit_field.
* doc/invoke.texi (Code Gen Options): Remove mention of warnings
and special packedp behavior from -fstrict-volatile-bitfields
documentation.
From-SVN: r203003
Diffstat (limited to 'gcc/expr.c')
-rw-r--r-- | gcc/expr.c | 26 |
1 files changed, 10 insertions, 16 deletions
@@ -1710,7 +1710,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize) && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)) tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT, (bytepos % slen0) * BITS_PER_UNIT, - 1, false, NULL_RTX, mode, mode); + 1, NULL_RTX, mode, mode); } else { @@ -1720,7 +1720,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize) mem = assign_stack_temp (GET_MODE (src), slen); emit_move_insn (mem, src); tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT, - 0, 1, false, NULL_RTX, mode, mode); + 0, 1, NULL_RTX, mode, mode); } } /* FIXME: A SIMD parallel will eventually lead to a subreg of a @@ -1761,7 +1761,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize) tmps[i] = src; else tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT, - bytepos * BITS_PER_UNIT, 1, false, NULL_RTX, + bytepos * BITS_PER_UNIT, 1, NULL_RTX, mode, mode); if (shift) @@ -2204,7 +2204,7 @@ copy_blkmode_from_reg (rtx target, rtx srcreg, tree type) bitpos for the destination store (left justified). */ store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode, extract_bit_field (src, bitsize, - xbitpos % BITS_PER_WORD, 1, false, + xbitpos % BITS_PER_WORD, 1, NULL_RTX, copy_mode, copy_mode)); } } @@ -2281,7 +2281,7 @@ copy_blkmode_to_reg (enum machine_mode mode, tree src) store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD, 0, 0, word_mode, extract_bit_field (src_word, bitsize, - bitpos % BITS_PER_WORD, 1, false, + bitpos % BITS_PER_WORD, 1, NULL_RTX, word_mode, word_mode)); } @@ -3029,7 +3029,7 @@ read_complex_part (rtx cplx, bool imag_p) } return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, - true, false, NULL_RTX, imode, imode); + true, NULL_RTX, imode, imode); } /* A subroutine of emit_move_insn_1. Yet another lowpart generator. @@ -6470,7 +6470,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos, temp_target = gen_reg_rtx (mode); temp_target = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1, - false, temp_target, mode, mode); + temp_target, mode, mode); temp = temp_target; } } @@ -9672,8 +9672,8 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, else if (SLOW_UNALIGNED_ACCESS (mode, align)) temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode), 0, TYPE_UNSIGNED (TREE_TYPE (exp)), - true, (modifier == EXPAND_STACK_PARM - ? NULL_RTX : target), + (modifier == EXPAND_STACK_PARM + ? NULL_RTX : target), mode, mode); } return temp; @@ -9864,7 +9864,6 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, HOST_WIDE_INT bitsize, bitpos; tree offset; int volatilep = 0, must_force_mem; - bool packedp = false; tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1, &unsignedp, &volatilep, true); rtx orig_op0, memloc; @@ -9875,11 +9874,6 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, infinitely recurse. */ gcc_assert (tem != exp); - if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0))) - || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL - && DECL_PACKED (TREE_OPERAND (exp, 1)))) - packedp = true; - /* If TEM's type is a union of variable size, pass TARGET to the inner computation, since it will need a temporary and TARGET is known to have to do. This occurs in unchecked conversion in Ada. */ @@ -10104,7 +10098,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, if (MEM_P (op0) && REG_P (XEXP (op0, 0))) mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); - op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp, + op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, (modifier == EXPAND_STACK_PARM ? NULL_RTX : target), ext_mode, ext_mode); |