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author | Segher Boessenkool <segher@kernel.crashing.org> | 2017-04-12 10:31:40 +0200 |
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committer | Segher Boessenkool <segher@gcc.gnu.org> | 2017-04-12 10:31:40 +0200 |
commit | ba6bf284a5a10ba6eba18135c6df05c479aac5ca (patch) | |
tree | fd2bdcde16172d9d03e5905abff5869393599a46 /gcc/expr.c | |
parent | 350792ffaed9b3506582b471bf133459d7ea64ab (diff) | |
download | gcc-ba6bf284a5a10ba6eba18135c6df05c479aac5ca.zip gcc-ba6bf284a5a10ba6eba18135c6df05c479aac5ca.tar.gz gcc-ba6bf284a5a10ba6eba18135c6df05c479aac5ca.tar.bz2 |
rs6000: Enforce quad_address_p in TImode atomic_load/store (PR80382)
Whatever expand expands to should be valid instructions. The defined
instructions here have a quad_memory_operand predicate, which boils
down to quad_address_p on the address, so let's test for that instead
of only disallowing indexed addresses.
* config/rs6000/sync.md (atomic_load<mode>, atomic_store<mode): Test
for quad_address_p for TImode, instead of just not indexed_address.
From-SVN: r246867
Diffstat (limited to 'gcc/expr.c')
0 files changed, 0 insertions, 0 deletions