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author | Kugan Vivekanandarajah <kuganv@linaro.org> | 2014-08-08 05:31:44 +0000 |
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committer | Kugan Vivekanandarajah <kugan@gcc.gnu.org> | 2014-08-08 05:31:44 +0000 |
commit | 8c9a36b7cac01afb70ca41c1435efb2077202035 (patch) | |
tree | 564b60254e3780325da325e3491a46fca2b8c908 /gcc/expr.c | |
parent | 362d42dcc965c63977160984292b3429c2d15de7 (diff) | |
download | gcc-8c9a36b7cac01afb70ca41c1435efb2077202035.zip gcc-8c9a36b7cac01afb70ca41c1435efb2077202035.tar.gz gcc-8c9a36b7cac01afb70ca41c1435efb2077202035.tar.bz2 |
calls.c (precompute_arguments): Check promoted_for_signed_and_unsigned_p and set the promoted mode.
gcc
2014-08-08 Kugan Vivekanandarajah <kuganv@linaro.org>
* calls.c (precompute_arguments): Check
promoted_for_signed_and_unsigned_p and set the promoted mode.
(promoted_for_signed_and_unsigned_p): New function.
(expand_expr_real_1): Check promoted_for_signed_and_unsigned_p
and set the promoted mode.
* expr.h (promoted_for_signed_and_unsigned_p): New function definition.
* cfgexpand.c (expand_gimple_stmt_1): Call emit_move_insn if
SUBREG is promoted with SRP_SIGNED_AND_UNSIGNED.
gcc/testsuite
2014-08-08 Kugan Vivekanandarajah <kuganv@linaro.org>
* gcc.dg/zero_sign_ext_test.c: New test.
From-SVN: r213750
Diffstat (limited to 'gcc/expr.c')
-rw-r--r-- | gcc/expr.c | 35 |
1 files changed, 34 insertions, 1 deletions
@@ -68,6 +68,7 @@ along with GCC; see the file COPYING3. If not see #include "tree-ssa-address.h" #include "cfgexpand.h" #include "builtins.h" +#include "tree-ssa.h" #ifndef STACK_PUSH_CODE #ifdef STACK_GROWS_DOWNWARD @@ -9224,6 +9225,35 @@ expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode, } #undef REDUCE_BIT_FIELD +/* Return TRUE if value in SSA is zero and sign extended for wider mode MODE + using value range information stored. Return FALSE otherwise. + + This is used to check if SUBREG is zero and sign extended and to set + promoted mode SRP_SIGNED_AND_UNSIGNED to SUBREG. */ + +bool +promoted_for_signed_and_unsigned_p (tree ssa, enum machine_mode mode) +{ + wide_int min, max; + + if (ssa == NULL_TREE + || TREE_CODE (ssa) != SSA_NAME + || !INTEGRAL_TYPE_P (TREE_TYPE (ssa)) + || (TYPE_PRECISION (TREE_TYPE (ssa)) != GET_MODE_PRECISION (mode))) + return false; + + /* Return FALSE if value_range is not recorded for SSA. */ + if (get_range_info (ssa, &min, &max) != VR_RANGE) + return false; + + /* Return true (to set SRP_SIGNED_AND_UNSIGNED to SUBREG) if MSB of the + smaller mode is not set (i.e. MSB of ssa is not set). */ + if (!wi::neg_p (min, SIGNED) && !wi::neg_p(max, SIGNED)) + return true; + else + return false; + +} /* Return TRUE if expression STMT is suitable for replacement. Never consider memory loads as replaceable, because those don't ever lead @@ -9527,7 +9557,10 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, temp = gen_lowpart_SUBREG (mode, decl_rtl); SUBREG_PROMOTED_VAR_P (temp) = 1; - SUBREG_PROMOTED_SET (temp, unsignedp); + if (promoted_for_signed_and_unsigned_p (ssa_name, mode)) + SUBREG_PROMOTED_SET (temp, SRP_SIGNED_AND_UNSIGNED); + else + SUBREG_PROMOTED_SET (temp, unsignedp); return temp; } |