diff options
author | Martin Jambor <mjambor@suse.cz> | 2012-03-16 16:02:41 +0100 |
---|---|---|
committer | Martin Jambor <jamborm@gcc.gnu.org> | 2012-03-16 16:02:41 +0100 |
commit | 0a1c20dcc6232d2d9ac536c2e75214a8bc0bda02 (patch) | |
tree | 4d093dcc4ebf7a9aa21b87506419fae7a5811f9a /gcc/expr.c | |
parent | 6814f778d841cb75ff96eaeea78ddfbf7952f475 (diff) | |
download | gcc-0a1c20dcc6232d2d9ac536c2e75214a8bc0bda02.zip gcc-0a1c20dcc6232d2d9ac536c2e75214a8bc0bda02.tar.gz gcc-0a1c20dcc6232d2d9ac536c2e75214a8bc0bda02.tar.bz2 |
expr.c (expand_expr_real_1): handle misaligned scalar reads from memory through MEM_REFs by calling...
2012-03-16 Martin Jambor <mjambor@suse.cz>
* expr.c (expand_expr_real_1): handle misaligned scalar reads from
memory through MEM_REFs by calling extract_bit_field.
* testsuite/gcc.dg/misaligned-expand-1.c: New test.
* testsuite/gcc.dg/misaligned-expand-3.c: Likewise.
From-SVN: r185470
Diffstat (limited to 'gcc/expr.c')
-rw-r--r-- | gcc/expr.c | 34 |
1 files changed, 20 insertions, 14 deletions
@@ -9347,21 +9347,27 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, MEM_VOLATILE_P (temp) = 1; if (modifier != EXPAND_WRITE && mode != BLKmode - && align < GET_MODE_ALIGNMENT (mode) - /* If the target does not have special handling for unaligned - loads of mode then it can use regular moves for them. */ - && ((icode = optab_handler (movmisalign_optab, mode)) - != CODE_FOR_nothing)) + && align < GET_MODE_ALIGNMENT (mode)) { - struct expand_operand ops[2]; - - /* We've already validated the memory, and we're creating a - new pseudo destination. The predicates really can't fail, - nor can the generator. */ - create_output_operand (&ops[0], NULL_RTX, mode); - create_fixed_operand (&ops[1], temp); - expand_insn (icode, 2, ops); - return ops[0].value; + if ((icode = optab_handler (movmisalign_optab, mode)) + != CODE_FOR_nothing) + { + struct expand_operand ops[2]; + + /* We've already validated the memory, and we're creating a + new pseudo destination. The predicates really can't fail, + nor can the generator. */ + create_output_operand (&ops[0], NULL_RTX, mode); + create_fixed_operand (&ops[1], temp); + expand_insn (icode, 2, ops); + return ops[0].value; + } + else if (SLOW_UNALIGNED_ACCESS (mode, align)) + temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode), + 0, TYPE_UNSIGNED (TREE_TYPE (exp)), + true, (modifier == EXPAND_STACK_PARM + ? NULL_RTX : target), + mode, mode); } return temp; } |